Digital correlators incorporating analog neural network structures operated on a bit-sliced basis

摘要

Plural-bit digital input signals to be subjected to weighted summation are bit-sliced; and a number N of respective first through N. sup.th weighted summations of the bits of the digital input signals in each bit slice are performed, resulting in a respective set of first through N.sup. th partial weighted summation results. Each weighted summation of a bit slice of the digital input signals is performed using a capacitive network that generates partial weighted summation results in the analog regime; and analog-to-digital conversion circuitry digitizes the partial weighted summation results. Weighted summations of the digitized partial weighted summation results of similar ordinal number are then performed to generate first through N.sup.th final weighted summation results in digital form, which results are respective correlations of the pattern of the digital input signals with the patterns of weights established by the capacitive networks. A neural net layer can be formed by combining such weighted summation circuitry with digital circuits processing each final weighted summation result non- linearly, with a system function that is sigmoidal.