Flexible basis function neural networks for efficient analog implementations.

摘要

Radial Basis Function Network is one well-known structure used for implementing static mapping in learning systems. It uses a set of radial basis functions, each dominating a local input area. One drawback is that the number of basis function components could increase abruptly when the input dimension increases. This problem could be made easy if the used basis function is not restricted to only one specific form such as the Gaussian function. The flexibility can be achieved using the Sum-of-Products Neural Network (SOPNN) structure. This study investigates two alternatives of the SOPNN for possible efficient hardware realization; both intend to eliminate the high cost multiplication. The first structure, named the Minimum-Sum Network, uses the minimum function to approximate the multiplication. The second structure, named the Sum-Exponential-Sum Network, uses the sum of logarithmic values for computing a product (i.e., a logarithmic multiplier). A logarithmic multiplier is an adder, which can efficiently handle the multiplication of many input values at one time. Learning rules have been derived and learning algorithms have been implemented. Both neural networks have been evaluated using control and pattern recognition examples.; The hardware design for the two new structures has been investigated. Hardware efficiency has been improved with expensive multipliers replaced by less expensive functions. Overall hardware designs for the MSN and SESN networks have been presented. It is possible to fabricate them onto a single chip using today's integrated circuit technology for real-time applications. In either structure, learned information is stored using analog floating-gate memory that facilitates the programmability and long-term storage. Parallel updating of stored weights are implemented and thus, only a single writing cycle is required to update all related weights for a given training sample. It is expected that the power consumption is low and a large number of processing units (submodules) can be packed to handle complex function learning.