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Radiation-hard, high-voltage semiconductive device structure fabricated on SOI substrate

机译:在SOI衬底上制造的抗辐射高压半导体器件结构

摘要

Highly doped N- and P-type wells (16a, 16b) in a first silicon layer (16) on an insulator layer (14) of a SIMOX substrate (10). Complementary MOSFET devices (52,54,58,62) are formed in lightly doped N- and P-type active areas (22a, 22b) in a second silicon layer (22) formed on the first silicon layer (16). Adjacent active areas (22a, 22b) and underlying wells (16a, 16b) are isolated from each other by trenches (36, 78) filled with a radiation-hard insulator material. Field oxide layers (42,64) are formed of a radiation-hard insulator material, preferably boron phosphorous silicon dioxide glass, over the surface of the second silicon layer (22) except in contact areas (68) of the devices (52,54,58, 62). The devices (52,54,58,62) are formed in the upper portions of the active areas (22a, 22b), and are insensitive to the interfacial states of the SIMOX substrate (10). The buried wells (16a, 16b ) under the active areas (22a, 22b) have low resistance and enable the devices (52,54,58,62) to have high snap-back voltages. The absence of sharp edges also eliminates edge leakage upon high dosage irradiation, thus producing devices that are more radiation-resistant.
机译:SIMOX基板(10)的绝缘层(14)上的第一硅层(16)中的高掺杂N型阱和P型阱(16a,16b)。在形成在第一硅层(16)上的第二硅层(22)中的轻掺杂N型和P型有源区(22a,22b)中形成互补的MOSFET器件(52、54、58、62)。相邻的有效区域(22a,22b)和下面的阱(16a,16b)通过填充有辐射硬绝缘材料的沟槽(36、78)相互隔离。场氧化物层(42,64)由抗辐射的绝缘体材料,最好是硼磷二氧化硅玻璃形成在第二硅层(22)的表面上,除了器件(52,54)的接触区域(68)之外。 ,58,62)。器件(52、54、58、62)形成在有源区(22a,22b)的上部,并且对SIMOX衬底(10)的界面状态不敏感。有源区(22a,22b)下面的掩埋阱(16a,16b)具有低电阻,并使器件(52、54、58、62)具有高的骤回电压。尖锐边缘的不存在还消除了高剂量辐照时的边缘泄漏,从而生产出更耐辐射的设备。

著录项

  • 公开/公告号US5137837A

    专利类型

  • 公开/公告日1992-08-11

    原文格式PDF

  • 申请/专利权人 HUGHES AIRCRAFT COMPANY;

    申请/专利号US19900569304

  • 发明设计人 CHEN-CHI P. CHANG;MEI F. LI;

    申请日1990-08-20

  • 分类号H01L21/265;H01L21/70;

  • 国家 US

  • 入库时间 2022-08-22 05:22:30

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