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Integrated circuit that combines multi-epitaxial power transistors with logic/analog devices, and a process to produce same

机译:结合了多外延功率晶体管与逻辑/模拟器件的集成电路及其生产工艺

摘要

An integrated circuit is formed on an N-type semiconductor wafer having a first N-type epitaxial layer on the substrate, a P-type epitaxial layer over the first N-type epitaxial layer, and a second N- type epitaxial layer over the P-type epitaxial layer. There are also a plurality of sets of P-type isolation regions separating the P-type epitaxial region and the surface of the second N-type epitaxial region into epitaxial tank regions for formation of bipolar and CMOS devices, combining high power, low power, logic, switching, analog, high current, low current, digital, and linear bipolar transistors along with CMOS transistors. The characteristics of the different type of devices are combined into a single process flow.
机译:在N型半导体晶片上形成集成电路,该N型半导体晶片具有在基板上的第一N型外延层,在第一N型外延层之上的P型外延层以及在P之上的第二N型外延层。型外延层。还有多组P型隔离区,将P型外延区和第二N型外延区的表面分成外延槽区,以形成双极型和CMOS器件,结合了高功率,低功率,逻辑,开关,模拟,高电流,低电流,数字和线性双极晶体管以及CMOS晶体管。不同类型设备的特性组合为一个处理流程。

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