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LARGE-CURRENT MOS TRANSISTOR INTEGRATED BRIDGE STRUCTURE FOR OPTIMIZATION OF CONTINUITY POWER LOSS

机译:大电流MOS晶体管集成桥式结构优化了连续功率损耗

摘要

PURPOSE: To provide a large-current MOS transistor integrated bridge which is formed in a monolithic structure on a single Si substrate, optimizing a conduction power loss. CONSTITUTION: An N++ -type substrate 3, which includes at least two arms respectively comprised of first and second MOS Trs and which forms a positive potential output terminal K1, covered with an N- -type epitaxial layer 4. A bridge is comprised of a P and P+ -type insulating regions 13, 25 and 14, 16, including N+ -type drain regions 15, 16, N-type drain regions 19, 20 and a pair of N+ -type source regions 23, 24 forming continuously P-type main body regions 21, 22 and a negative potential output terminal with respect to each of the first Tr. The bridge also consists of an N+ -type drain regions 5, 6, including N-type drain regions 31, 32 with respect to each of the second Tr, continuously P-type main body regions 9, 10 and a pair of N+ -type regions 11, 12 forming respectively corresponding ac inputs A3, A4.
机译:用途:提供一种大电流MOS晶体管集成桥,该桥以单片结构形成在单个Si衬底上,从而优化了传导功率损耗。组成:一种N ++型衬底3,其包括至少两个分别由第一和第二MOS Trs组成的臂,并且形成覆盖有N-型外延层4的正电势输出端子K1。桥由P和P +型绝缘区13、25和14、16组成,包括N +型漏区15、16,N型漏区19、20和一对N。相对于每个第一Tr,连续形成P型主体区域21、22和负电位输出端子的+型源极区域23、24。桥还由N +型漏区5、6组成,包括相对于第二Tr中的每个Tr的N型漏区31、32,连续的P型主体区9、10和一对。 N +型区域11、12分别形成对应的交流输入端A3,A4。

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