Threshold value circuit with two MOS transistors - has transistors with source-drain sections connected in series with gate electrodes forming input and drain electrodes forming output

摘要

The voltage at the output of the circuit is dependent upon whether an input voltage is higher or lower than a given threshold value. The MOS transistors (P1,N1) are each connected via a further MOS transistor (P2,N2) of the same conductivity, to a pole of the operating voltage source. The gate electrodes of the further MOS transistors (P2,N2) are momentarily connectable to the output (2), and have a larger effective surface than the first MOS transistors (P1,N1). A controllable switch (S) is arranged between the gate electrodes of the further MOS transistors (P2,N2) and the output. An amplifier (5) is arranged between the output and the controllable switch. The input to the amplifier is connected to the output (2) and its output is connected to the controllable switch. USE - For analogue-to-digital converters, esp. operating above 100 MHz.