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VERFAHREN UND SCHALTUNGSANORDNUNG ZUR FREQUENZGANGKORREKTUR EINES SIGNALS UND/ODER BEEINFLUSSUNG VON STOERGROESSEN IN EINEM REGELKREIS
VERFAHREN UND SCHALTUNGSANORDNUNG ZUR FREQUENZGANGKORREKTUR EINES SIGNALS UND/ODER BEEINFLUSSUNG VON STOERGROESSEN IN EINEM REGELKREIS
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机译:控制电路中信号和/或影响干扰变量的频率校正的过程和电路布置
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摘要
The invention relates to a process and circuit arrangement for correcting the frequency response of a signal and/or affecting interference in a regulating circuit. Here, high frequencies are summed in the signal and/or the transfer behaviour of the signal is transformed and/or the signal is separated into several signals. For the purposes of implementation a delay compensating circuit and/or a transfer circuit and/or a selection circuit is arranged at the output of a transmission component. To affect interference in a regulating circuit with a measuring signal formed by a measuring device and having a command variable whereby the measuring signal of the control value is transformed after a fifth summation point into a delay-free proportional signal, a difference signal is formed with the signal of the command variable in a first summation point and sent to a regulator for interference compensation. The interference-free signal with respect to the measuring device is transformed into a delay-free proportional signal with respect to the control range and all the interference signals acting on the control value are converted into a supply interference signal and sent to a second summation point. The signal of the control variable is also sent to the second summation point and a dynamically corrected signal for the regulation deviation and, by adaptation and lock-on, a signal improving the control and interference transmission ratio (improved signal) is formed. The improved signal and that of the control variable are adapted as a correcting signal and summarily sent to the second summation point while its algorithmically optimised output signal and the output signal of the regulator are set to a third summation point. The setting value signal is fed back to the third summation point to optimise and limit its output signal via the setting device and sent to the fourth summation point and to the input of the control section.
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