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Bipolar-CMOS integrated circuit having a structure suitable for high integration
Bipolar-CMOS integrated circuit having a structure suitable for high integration
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机译:具有适合于高集成度的结构的双极CMOS集成电路
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摘要
Herein disclosed is a bipolar-CMOS semiconductor circuit having a semiconductor substrate, an N.sup.- epitaxial layer formed on the semiconductor substrate, an N well formed in the N.sup.- epitaxial layer, a P well formed in the N.sup.- epitaxial layer, a power supply terminal to which the positive potential is to be supplied, a ground potential terminal, an input terminal, an output terminal, an NPN bipolar transistor formed in the N.sup.- epitaxial layer, the NPN bipolar transistor having the N.sup.- epitaxial layer as the collector thereof and having an emitter connected to the output terminal, a P-channel type MOS transistor formed in the N well and being connected between the power supply terminal and the base of the NPN bipolar transistor, the gate of the P-channel type MOS transistor being connected to the input terminal, and both the N well for the P-channel type MOS transistor and the N.sup.- epitaxial layer as the collector of the NPN bipolar transistor being connected to the power supply terminal, and an N-channel type MOS transistor formed in the P well and being connected between the output terminal and the ground potential terminal, the gate of the N-channel type MOS transistor being connected to the input terminal.
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