Apparatus for dividing elements of a finite galois field and decoding error correction codes

摘要

A mutual division circuit includes a single mutual division unit or a plurality of cascaded mutual division units for dividing a polynomial including a first input polynomial R.sub.i-1 (X) as a factor by a second input polynomial Q.sub.i-1 (X), thereby to determine a quotient and a remainder R.sub.i (X), determining an overall quotient &lgr;.sub.i (X) from the quotient and a third input polynomial &lgr;.sub. i-1 (X), and producing the remainder R.sub.i (X), the first input polynomial R.sub.i-1 (X) or the second input polynomial Q.sub.i-1 (X), and the overall quotient &lgr;.sub.i (X) as a first output polynomial R. sub.i (X), a second output polynomial Q.sub.i (X), and a third output polynomial . lambda..sub.i (X), respectively. The mutual division circuit also has a data selector (42) for receiving, at an input port thereof, respective initial polynomials of the first, second, and third input polynomials, and supplying output data to the single mutual division unit or a first one of the cascaded mutual division units, and a feedback or data bus (45) for supplying output data from the single mutual division unit or a last one of the cascaded mutual division units to another input port of the data selector (42). The single mutual division unit or the cascaded mutual division units are used a plurality of times for carrying out arithmetic operations therein.