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EXTRACTING METHOD FOR MODEL PARAMETER FOR CIRCUIT SIMULATION OF MOS TYPE TRANSISTOR

机译:MOS型晶体管电路仿真模型参数的提取方法

摘要

PURPOSE: To easily obtain each proper parameter by summing an actual drain resistance and a source resistance from a specified parasitic resistance. ;CONSTITUTION: ON resistance (Ron)-channel length (L) characteristic is obtained from drain source current (Ids)-drain source voltage (vds), summing resistance (RD + RS) and the initial value of the width (2LD) of inter-channel-drain depletion layer. Then, parasitic resistance (Rp)-drain source voltage (Vds) characteristic is obtaine by an expression from ON resistance (Ron)-channel length (L) at the time of setting an electrode between an internal drain and source to be V'ds, a channel width to be W, the capacitance of a gate oxide film to be Cox. threshold value voltage to be Vth, gate source volume to be Vgs, a channel resistance to be Rch = V'ds/Ids and the channel length (L) to be an independent variable. Then, the sum (RD + RS) of the actual drain resistance (RD) and the source resistance (RS) is obtained from Rp of the intersection of a line obtaine by prolonging the linear area of the characteristic and the line of Vds =0.;COPYRIGHT: (C)1994,JPO&Japio
机译:目的:通过将实际寄生电阻和源寄生电阻与指定的寄生电阻相加来轻松获得每个合适的参数。 ;组成:导通电阻(Ron)-沟道长度(L)特性是由漏极源电流(Ids)-漏极源电压(vds),求和电阻(RD + RS)和宽度的初始值(2LD)获得的沟道间漏极耗尽层。然后,通过将在内部漏极和源极之间的电极设置为V'ds时的导通电阻(Ron)-沟道长度(L)的表达式来获得寄生电阻(Rp)-漏极-源极电压(Vds)特性。 ,沟道宽度为W,栅氧化膜的电容为Cox。阈值电压为Vth,栅极源极体积为Vgs,沟道电阻为Rch = V'ds / Ids,沟道长度(L)为自变量。然后,从延长特性线和Vds = 0的线的线性区域而获得的线的交点的Rp获得实际漏极电阻(RD)和源极电阻(RS)的总和(RD + RS)。 。;版权:(C)1994,JPO&Japio

著录项

  • 公开/公告号JPH06195426A

    专利类型

  • 公开/公告日1994-07-15

    原文格式PDF

  • 申请/专利权人 NIPPON STEEL CORP;

    申请/专利号JP19920357025

  • 发明设计人 MORI KENJI;

    申请日1992-12-23

  • 分类号G06F15/60;G01R31/26;

  • 国家 JP

  • 入库时间 2022-08-22 04:52:55

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