Non-volatile semiconductor memory device having, at the prestage of an address decoder, a level shifter for generating a program voltage

摘要

A non-volatile semiconductor device includes word lines (WL1 to WL4), and a non-volatile memory cell array (23) having a plurality of non-volatile memory cells (MC11 to MC44) respectively connected to the word lines (WL1 to WL4). The non-volatile semiconductor memory device further includes a level shifter for receiving, in a programming mode, an address signal supplied from outside, and shifting the potential level of the address signal to a higher programming potential level, and a row decoder (21), provided between the word lines (WL1 to WL4) and the level shifter (25A; 25B), for receiving and decoding the address signal which has been shifted by the level shifter (25A; 25B), and selecting one of the word lines (WL1 to WL4) in accordance with the result of the decoding of the address signal, and setting the potential of the selected word line to the programming potential level. IMAGE