首页> 外国专利> An interface - circuit for coupling of a logical low voltage - circuit with a high voltage - output, is realized in a standard - cmos - technology

An interface - circuit for coupling of a logical low voltage - circuit with a high voltage - output, is realized in a standard - cmos - technology

机译:接口-用于耦合逻辑低压的电路-具有高压输出的电路以标准方式实现-cmos-技术

摘要

The present invention relates to an intermediary circuit between a low voltage logic circuit and a high voltage output stage in standard CMOS technology. The output stage (20) is comprised of two transistors, respectively with N channel and P channel, achieved according to a standard CMOS technology. The intermediary circuit is comprised of a voltage level translator (21) coupled between an input logic circuit SL and said output stage (20). The voltage level translator (21) is achieved according to a standard CMOS technology and is comprised of at least two similar base blocks forming voltage mirrors interconnected in a cross-configuration. Said circuit is used to control transducers, plasma screens and electromechanical actuators.
机译:本发明涉及在标准CMOS技术中在低压逻辑电路和高压输出级之间的中间电路。输出级(20)由根据标准CMOS技术实现的分别具有N沟道和P沟道的两个晶体管组成。中间电路包括耦合在输入逻辑电路SL和所述输出级(20)之间的电压电平转换器(21)。电压电平转换器(21)是根据标准CMOS技术实现的,并且包括至少两个相似的基块,这些基块形成以交叉配置互连的电压镜。所述电路用于控制换能器,等离子屏和机电致动器。

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