首页> 外国专利> Semiconductor chip package with stepped connecting element surfaces - has wire bonds from chip to upper steps of elements with encapsulation completely enveloping chip on lower steps

Semiconductor chip package with stepped connecting element surfaces - has wire bonds from chip to upper steps of elements with encapsulation completely enveloping chip on lower steps

机译:具有阶梯状连接元件表面的半导体芯片封装-从芯片到元件的较高阶梯之间具有引线键合,封装在较低的阶梯上完全包围了芯片

摘要

A number of connecting elements (20) are arranged in two rows facing each other across the upper surface of a strip (10) of polyimide-based adhesive. Each element has a lower step (20a) to which an edge of the chip (1) is fixed with insulating tape (30), and a higher step (20b) to which metallic wire bonds (5) from the chip are secured. The assembly is held together by encapsulating resin (6) which surrounds all sides of the chip but leaves the top and underside of each connecting element exposed. ADVANTAGE - Assembly surface area and mfg. cost are reduced with fewer and simpler process steps and no lead frame.
机译:多个连接元件(20)在聚酰亚胺基粘合剂条(10)的上表面上彼此面对地布置成两排。每个元件具有下部台阶(20a)和更高台阶(20b),下部台阶(20a)通过绝缘带(30)固定到该下部台阶(20a),所述金属引线键合(5)来自芯片。该组件通过封装树脂(6)固定在一起,该树脂围绕芯片的所有侧面,但每个连接元件的顶面和底面都暴露在外。优势-装配表面积和制造力。通过更少和更简单的工艺步骤以及无引线框架来降低成本。

著录项

  • 公开/公告号DE4337675A1

    专利类型

  • 公开/公告日1994-05-11

    原文格式PDF

  • 申请/专利权人 GOLDSTAR ELECTRON CO. LTD. CHEONGJU KR;

    申请/专利号DE19934337675

  • 发明设计人 SONG CHI JUNG DAEJON KR;

    申请日1993-11-04

  • 分类号H01L23/02;

  • 国家 DE

  • 入库时间 2022-08-22 04:35:40

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