Circuit for correction of a single error bit in a hamming code processed by a plurality of large-scale integrated chips (LS1)

摘要

The invention relates to a circuit for correction of an erroneous bit in the event of a single error in a HAMMING code processed by a plurality of large-scale integrated chips (LSI). A flow of Hamming-code data bits which arrives is divided into a plurality of groups of data bits and sent to a plurality of chips 11, 12, 13, 14 of the integrated circuit respectively. Syndromes are obtained from groups of data bits and a first signal and a second signal are obtained from the syndromes, the first signal identifying the position of an erroneous bit in each group of data bits and the second signal identifying that one of the groups of data in which the erroneous bit has appeared. Each integrated circuit chip 11, 12, 13, 14 includes a register 17. 1... for storing the data bits of the associated group of data bits and for replacing a stored data bit by an error correction bit. An exclusive OR gate 18. 1... inverts the logic states of an erroneous bit originating from the register 17. 1... in response to an output signal originating from an AND gate 20. 1... The inverted bit is sent back, as feedback, to the register as an error correction bit. Application to error correction in data processing systems. IMAGE