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Microcomputer using specific instruction bit and mode switch signal for distinguishing and executing different groups of instructions in plural operating modes

机译:微型计算机使用特定的指令位和模式切换信号来区分和执行多种操作模式下的不同指令组

摘要

To increase the kinds of executable instructions of a microcomputer without increasing the number of bits (e.g. 8 bits) constituting one word or instruction, that is, without decreasing the execution speed or increasing the ROM usage, two or more instruction groups including instructions of different kinds, respectively, are provided operation modes are determined for the respective instruction groups; and the respective instruction groups to be executed are switched according to the respective operation modes. The microcomputer includes an instruction register, an execution control unit, a mode memory flip- flop, gates, two predecoders, a programmable logic array, an arithmetic logic unit, etc. The ordinary and special instruction groups can be selected in response to an interrupt entry signal and an interrupt return signal and a specific bit of an instruction, for instance.
机译:为了增加微型计算机的可执行指令的种类而不增加构成一个字或指令的位数(例如8位),即在不降低执行速度或不增加ROM使用的情况下,包括不同指令的两个或更多个指令组分别为每种指令组确定了几种操作模式;并且根据各个操作模式切换要执行的各个指令组。微型计算机包括指令寄存器,执行控制单元,模式存储器触发器,门,两个预解码器,可编程逻辑阵列,算术逻辑单元等。可以响应中断选择普通和特殊指令组。进入信号和中断返回信号以及指令的特定位。

著录项

  • 公开/公告号US5335331A

    专利类型

  • 公开/公告日1994-08-02

    原文格式PDF

  • 申请/专利权人 KABUSHIKI KAISHA TOSHIBA;

    申请/专利号US19910728681

  • 发明设计人 TETSURO WADA;YUTAKA MURAO;

    申请日1991-07-12

  • 分类号G06F9/46;

  • 国家 US

  • 入库时间 2022-08-22 04:31:22

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