首页> 外国专利> VERTICAL IC CHIP STACK HAVING DISCRETE CHIP CARRIERS FORMED FROM DIELECTRIC TAPE

VERTICAL IC CHIP STACK HAVING DISCRETE CHIP CARRIERS FORMED FROM DIELECTRIC TAPE

机译:垂直IC芯片堆栈具有由绝缘胶带制成的离散芯片载体

摘要

PURPOSE: To provide a three-dimensional IC chip stack which enables saving of an occupied area, processes advantages of an LTCC structure, enables use of standard IC chips and enables replacement of a defective chip alone, without discarding other chips of the stack. ;CONSTITUTION: Each of chip carriers, 6, 8 is constructed of a plurality of jointed dielectric tape layers 14, 16,...24 and equipped with a floor 10 for the carrier and a hollow 30, formed of an opening of an upper tape layer 12. IC chips 2, 4 are disposed in this hollow 30, accordingly, and a horizontal wiring line provided on the floor along one or more tape layers, a vertical wiring line 28 passing through the uppermost tape layer of the floor and extending to the horizontal wiring line, an electric connector 26 for connecting the IC chips 2, 4 to the vertical wiring line 28, an inter-carrier mutual connection part 34 connecting the vertical wiring lines for adjacent carriers and a stack connection part 32 connected to each inter-carrier mutual connection part 34, so as to make external connection for a stack, are provided.;COPYRIGHT: (C)1995,JPO
机译:目的:提供一种三维IC芯片叠层,其能够节省占用的面积,处理LTCC结构的优点,能够使用标准IC芯片并且能够单独更换有缺陷的芯片,而不会丢弃叠层中的其他芯片。组成:每个芯片载体6、8由多个接合的介电带层14、16,... 24构成,并配备了载体的底板10和由上层开口形成的空腔30带芯片层12。将IC芯片2、4布置在该凹部30中,并且沿着一层或多层带子层在地板上设置水平布线,垂直布线28穿过地板的最上层的胶带层并延伸。在水平布线上,设有用于将IC芯片2、4连接至垂直布线28的电连接器26,将相邻布线的垂直布线连接的载体间相互连接部34,以及分别与各载体连接的层叠连接部32。设置了载体间相互连接部分34,以便进行堆叠的外部连接。;版权所有:(C)1995,JPO

著录项

  • 公开/公告号JPH07263625A

    专利类型

  • 公开/公告日1995-10-13

    原文格式PDF

  • 申请/专利权人 HUGHES AIRCRAFT CO;

    申请/专利号JP19940305151

  • 发明设计人 BONE ROBERT;VORA KIRTI;

    申请日1994-12-08

  • 分类号H01L25/10;H01L25/11;H01L25/18;

  • 国家 JP

  • 入库时间 2022-08-22 04:29:28

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