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Vertical IC chip stack with discrete chip carriers formed from dielectric tape

机译:具有由介电带形成的分立芯片载体的垂直IC芯片堆栈

摘要

A 3-D integrated circuit (IC) chip stack employs a plurality of discrete chip carriers that are formed from dielectric tape layers such as fused low temperature cofired ceramic (LTCC) tape. The chips are lodged in cavities within the tape layers, and are either flip-chip or wire bond connected to electrical routings that extend along one or more tape layers toward the periphery of the carrier. Intercarrier interconnects are provided between the routings for adjacent carriers, either through the carrier side walls or externally. The carriers are mechanically secured to each other within the stack either by connectors that also provide an I/O signal capability, or by an adhesive if external electrical connectors are used. The structure is strong, compact, inexpensive, compatible with conventional IC chips and capable of disassembly and reassembly to replace a bad chip.
机译:3-D集成电路(IC)芯片堆栈采用了多个离散的芯片载体,这些载体是由介电胶带层(例如,熔融低温共烧陶瓷(LTCC)胶带)形成的。芯片被放置在带层内的空腔中,并且通过倒装芯片或引线键合连接到沿着一个或多个带层朝向载体的外围延伸的电气路径。通过相邻的载架侧壁或从外部在相邻载架的布线之间提供载架间互连。通过也提供I / O信号功能的连接器,或者如果使用外部电连接器,则通过粘合剂将托架机械地彼此固定在堆叠内。该结构坚固,紧凑,便宜,可与常规IC芯片兼容,并且能够拆卸和重新组装以替换损坏的芯片。

著录项

  • 公开/公告号US5600541A

    专利类型

  • 公开/公告日1997-02-04

    原文格式PDF

  • 申请/专利权人 HUGHES AIRCRAFT COMPANY;

    申请/专利号US19950510735

  • 发明设计人 ROBERT BONE;KIRTI VORA;

    申请日1995-08-03

  • 分类号H05K7/20;

  • 国家 US

  • 入库时间 2022-08-22 03:10:40

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