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DELAY TIME CALCULATION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND COMPUTER AIDED DESIGN DEVICE
DELAY TIME CALCULATION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND COMPUTER AIDED DESIGN DEVICE
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机译:半导体集成电路与计算机辅助设计装置的延时计算方法
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摘要
PURPOSE: To accurately calculate the delay time of a logic cell without the need of calculating a delay time equation. ;CONSTITUTION: Delay time by the rounding of an input signal for deciding the delay time of the logic cell, load capacity and plural pieces of information of delay time corresponding to them are defined in a delay definition file 3. A delay time calculation device 12 reads information of the logic cell developed from a data base 2 and information of a net, allocates load capacity on the respective nets and calculates the input slews of the logic cell. The calculation device 12 calculates the delay time of the respective logic cells by an interpolation method based on the input slews of the logic cell whose delay time is to be calculated, the load capacity of an output terminal, the input slews of the respective logic cells, the load capacity of the output terminal and delay time corresponding to them, which are stored in the file 3.;COPYRIGHT: (C)1995,JPO
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