LOW-RC MULTI-LEVEL INTERCONNECT TECHNOLOGY FOR HIGH-PERFORMANCE INTEGRATED CIRCUIT

摘要

PURPOSE: To make an RC interconnection delay smaller than that of a multi- level metallization device, based on aluminum, by combining a free space intermediate level dielectric and a copper metallization. ;CONSTITUTION: A first flattened intermediate level oxide dielectric (ILD1) 6 is deposited. A mask for a negative image of a hexagonal pattern 1 is used to form a pattern of resist. When aligned silicon nitride is deposited by a CVD process, hexagonal islands surrounded and sealed by the silicon nitride are formed. Grooves are made in the intermediate level oxide dielectric ILD1 by an etching process. Then a copper blanket layer is deposited thereon. The above operation is repeated to sequentially laminate second, third and fourth intermediate level oxide dielectric layers. Metallization based on aluminum deteriorates electrical characteristics due to an RC induced propagation delay of a parasitic resistive element and parasitic capacitive element. However, the use of copper enables reduction in the RC interconnection delay.;COPYRIGHT: (C)1995,JPO