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Multiplier circuit for fixed point numbers in binary representation using at least one multiplier
Multiplier circuit for fixed point numbers in binary representation using at least one multiplier
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机译:使用至少一个乘法器以二进制表示的定点数乘法电路
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摘要
Using the multiplier circuit, it is possible to multiply fixed point numbers whose number of digits is greater than the n-digit multiplier used. For this purpose, the fixed point numbers are represented as n-digit binary numbers, the partial products are formed with the aid of the multiplier and the partial products are added up, only the nth most significant bit of the less significant partial product being used in the case of partial products having a different positional weight. This leads to a round result. IMAGE
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