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method and device for transmissions with carrier frequency on the power lines.

机译:电力线上载频传输的方法和装置。

摘要

The transmitter in a power line communications system applies to the power line encoded logical-one and logical-zero bit signals consisting of signals formed respectively of predetermined different sequences of frequencies. The receiver, coupled to the power line, includes a first homodyne, non-coherent, quadratic demodulator for demodulating the logical-one bits and a second for demodulating the logical-zero bits. The first demodulator produces, locally, and in first and second channels, respectively, a first reference signal that is a replica of the logical-one bit sequence of frequencies and a second reference signal that is the replica in quadrature. The second demodulator produces, locally, and in third and fourth channels, respectively, corresponding third and fourth reference signals for the logical-zero bit sequence. Each of the four reference signals is applied to a corresponding analog multiplier for multiplication by the input signal in each channel. The output of each multiplier is applied to a low pass filter that passes only the dc component of the product signal which in turn is squared. The resultant signals in the first and second channels are summed to provide a first output signal, and the resultant signals in the third and fourth channels are summed to provide a second output signal. Compensation circuitry cancels error voltages developed in the demodulation channeis as a result of component offset, and the two output signals are integrated over a bit period and then compared to each other to detect a logical-one or logical-zero bit.
机译:电力线通信系统中的发射机将由分别由预定的不同频率序列形成的信号组成的逻辑一和逻辑零位信号应用于电力线编码。耦合到电力线的接收器包括用于解调逻辑一比特的第一零差,非相干二次解调器和用于解调逻辑零的比特的第二解调器。第一解调器分别在本地和第一和第二通道中分别产生第一参考信号和第二参考信号,第一参考信号是频率的逻辑一比特序列的副本,第二参考信号是正交的副本。第二解调器分别在本地,第三和第四通道中产生逻辑零位序列的相应第三和第四参考信号。四个参考信号中的每一个都施加到相应的模拟乘法器,以与每个通道中的输入信号相乘。每个乘法器的输出被施加到一个低通滤波器,该滤波器仅使乘积信号的直流分量通过,而该分量又被平方。将第一和第二通道中的结果信号相加以提供第一输出信号,将第三和第四通道中的结果信号相加以提供第二输出信号。补偿电路消除了由于组件偏移而在解调通道中产生的误差电压,并且两个输出信号在一个位周期内被积分,然后彼此比较以检测逻辑1或逻辑0的位。

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