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Method of manufacture of a monolithic integrated circuit with at least one field effect transistor (cmos) and a bipolar npn transistor.
Method of manufacture of a monolithic integrated circuit with at least one field effect transistor (cmos) and a bipolar npn transistor.
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机译:具有至少一个场效应晶体管(cmos)和双极npn晶体管的单片集成电路的制造方法。
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摘要
The invention relates to a method of manufacture of a monolithic integrated circuit, with at least one field effect transistor cmos and an npn bipolar transistor, in which a thin oxide layer is covered with a protective layer of polysilicon both in the zone of the bipolar transistor, and in the area of the field effect transistor.
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