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Testability architecture and techniques for programmable interconnect architecture
Testability architecture and techniques for programmable interconnect architecture
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机译:可测试性架构和可编程互连架构技术
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摘要
An integrated circuit having a plurality of input/output modules, each of which has input/output modules including an input module section having an input node connected to a unique input/output pin on the integrated circuit and an output node communicating with a unique first internal node in the integrated circuit, and an output module section having an input node communicating with a unique second internal node in the integrated circuit and an output node communicating with the unique input/output pin. Each input/output module is programmable by a user such that its function may be defined as an input module, an output module, or a bi-directional module. The integrated circuit further has two states, a first unprogrammed state where none of the functions of the input/output modules have been defined, and a second, programmed state in which the functions of the input/output modules have been defined by either enabling or disabling the output section of the input/output module. Circuitry for testing the input module section of one of the input/output modules in the unprogrammed state comprises means for temporarily disabling the output section of a unique one of the input/output modules, means for temporarily connecting the output node of the input module section to a test node on said integrated circuit, and means for communicating the state of the test node to a test input/output pin on the integrated circuit.
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