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Instruction prefetching circuit with a next physical address precalculating circuit
Instruction prefetching circuit with a next physical address precalculating circuit
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机译:具有下一个物理地址预计算电路的指令预取电路
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摘要
After a logical page number is stored, upon execution of a branch instruction, into a logical page number section in an effective address register, an address converting buffer is retrieved in accordance with a value obtained by addition of "1" to a logical page number of an instruction being executed at present, and a physical page number for a page-over is stored into a page-over address register. Thereafter, when a page-over occurs, the output of the page-over address register is selected by a physical page number selecting circuit and stored into the physical page number section in the instruction address register.
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