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Semiconductor device with a multilayered contact structure having a boro- phosphate silicate glass planarizing layer

机译:具有多层接触结构的半导体器件,该多层接触结构具有硼磷酸盐硅酸盐玻璃平坦化层

摘要

A high-density semiconductor memory device has a self-aligning contact structure for electrical connection between lower and upper conductive layers, and an inter-insulating layer with a via for forming the contact structure. The contact structure has a contact pad including a first conductive layer electrically connected with the lower conductive layer within the via and formed on a predetermined portion of the inter- insulating layer around the groove, a planarizing material filling up the groove formed on the first conductive layer, and second conductive layers formed on the planarizing material and exposed first conductive layer.
机译:高密度半导体存储器件具有用于下和上导电层之间的电连接的自对准接触结构,以及具有用于形成接触结构的通孔的中间绝缘层。接触结构具有接触垫,该接触垫包括第一导电层,该第一导电层与通孔内的下导电层电连接并形成在围绕凹槽的中间绝缘层的预定部分上,平坦化材料填充形成在第一导电层上的凹槽。形成在平坦化材料上的第二导电层和暴露的第一导电层。

著录项

  • 公开/公告号US5414302A

    专利类型

  • 公开/公告日1995-05-09

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号US19940188113

  • 发明设计人 YUN-SEUNG SHIN;SUNG-NAM CHANG;

    申请日1994-01-28

  • 分类号H01L23/48;H01L29/44;H01L29/52;H01L29/10;

  • 国家 US

  • 入库时间 2022-08-22 04:05:03

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