Clock phase detecting system for detecting the phase difference between two clock phases regardless of which of the two clock phases leads the other

摘要

A phase detecting system is provided for detecting when phase differences which occur between first and second clock pulses from a clock generator exceed acceptable tolerances, regardless of whether the first clock pulse leads the second clock pulse or the second clock pulse leads the first clock pulse. Two identical phase detectors are utilized each of which includes a phase detecting circuit, one group of signal delay elements that allow flip-flops in the phase detecting circuits time to set in order to detect the phase changes, and another group of signal delay elements coupled to the flip-flops which are set so the phase detecting circuit is capable of detecting the nominal phase delay times between the first and second clock pulses. The phase detecting circuits also each have a pair of setable latches and logic circuitry which is coupled to the latches to control them such that each latch is associated with one of the clock pulses, and the phase detecting circuits function to active clock phase identification signals that identify which of the two clock pulses leads the other.