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Method for forming TiW fuses in high performance BiCMOS process

机译:高性能BiCMOS工艺中形成TiW熔丝的方法

摘要

A method for providing programmable devices in which an insulation layer, such as an oxide (20), TEOS, or the like, is formed during a BiCMOS integrated circuit fabrication process includes forming a first conductor fuse layer (22), for example of TiW or the like, on the insulation layer (20). The fuse layer (22) may then be patterned, and a second insulation layer (23) formed over it. Alternatively, the fuse layer (53) may be left unpatterned and one or more conductor layers (35, 36) may be formed over the fuse layer (53). The conductor layer (35,36) is patterned, and the fuse layer (53) thereafter patterned using the conductor layer (35,36) as an etch mask. In either case, contact holes (26) are formed in the insulation layer (20) to regions (14,15) to which contact is desired under the insulation layer (20). Contact conductors (28), such as of tungsten or the like, are formed in the contact holes (26) to contact the fuse (34), contact layers ( 22), or regions (14,15) under the insulation layer (20), as needed.
机译:一种用于提供可编程器件的方法,其中在BiCMOS集成电路制造过程中形成绝缘层,例如氧化物(20),TEOS等,包括形成第一导体熔丝层(22),例如TiW绝缘层(20)上的类似物。然后可以对熔丝层(22)进行构图,并在其上形成第二绝缘层(23)。可替代地,可以使熔丝层(53)保持未图案化,并且可以在熔丝层(53)上方形成一个或多个导体层(35、36)。对导体层(35,36)进行构图,然后使用导体层(35,36)作为蚀刻掩模对熔丝层(53)进行构图。在任一种情况下,在绝缘层(20)中形成到绝缘层(20)下面需要接触的区域(14,15)的接触孔(26)。诸如钨等的接触导体(28)形成在接触孔(26)中,以接触保险丝(34),接触层(22)或绝缘层(20)下方的区域(14,15)。 ), 如所须。

著录项

  • 公开/公告号US5457059A

    专利类型

  • 公开/公告日1995-10-10

    原文格式PDF

  • 申请/专利权人 TEXAS INSTRUMENTS INCORPORATED;

    申请/专利号US19940234894

  • 发明设计人 RAJIV R. SHAH;STEPHEN A. KELLER;

    申请日1994-04-28

  • 分类号H01L23/62;

  • 国家 US

  • 入库时间 2022-08-22 04:04:13

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