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STORAGE CELL HAVING REDUCED LEAK CURRENT BY USING LOW-POWER AND LOW-THRESHOLD CMOS PASS TRANSISTOR
STORAGE CELL HAVING REDUCED LEAK CURRENT BY USING LOW-POWER AND LOW-THRESHOLD CMOS PASS TRANSISTOR
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机译:通过使用低功率和低阈值CMOS晶体管,可降低存储单元的泄漏电流
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摘要
PROBLEM TO BE SOLVED: To obtain the storage cell which has at least one of the pass transistor(TR) operating even with a low source voltage and a low-threshold voltage minimizing a decrease in maximum operating frequency and suppressing a leak current. ;SOLUTION: The storage cell is equipped with a 1st bit line BL, a storage circuit, and the pass TR 12. The storage circuit is equipped with a 1st storage node 14 for holding a logical state indicating a logical value. The pass TR 12 is connected to a 1st bit line WL and the 1st node 14 so as to form a transmission line between the both. A 1st TR 12 is applied with a bias voltage which changes the 1st TR 12 substantially into a noncontact state unless the storage cell 10 is accessed. The TR applied with a reverse bias substantially reduces a leak current passing through the pass TR.;COPYRIGHT: (C)1996,JPO
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