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STORAGE CELL HAVING REDUCED LEAK CURRENT BY USING LOW-POWER AND LOW-THRESHOLD CMOS PASS TRANSISTOR

机译:通过使用低功率和低阈值CMOS晶体管,可降低存储单元的泄漏电流

摘要

PROBLEM TO BE SOLVED: To obtain the storage cell which has at least one of the pass transistor(TR) operating even with a low source voltage and a low-threshold voltage minimizing a decrease in maximum operating frequency and suppressing a leak current. ;SOLUTION: The storage cell is equipped with a 1st bit line BL, a storage circuit, and the pass TR 12. The storage circuit is equipped with a 1st storage node 14 for holding a logical state indicating a logical value. The pass TR 12 is connected to a 1st bit line WL and the 1st node 14 so as to form a transmission line between the both. A 1st TR 12 is applied with a bias voltage which changes the 1st TR 12 substantially into a noncontact state unless the storage cell 10 is accessed. The TR applied with a reverse bias substantially reduces a leak current passing through the pass TR.;COPYRIGHT: (C)1996,JPO
机译:解决的问题:获得一种存储单元,该存储单元具有即使在低源电压和低阈值电压下也工作的传输晶体管(TR)中的至少一个,以最小化最大工作频率的降低并抑制泄漏电流。 ;解决方案:该存储单元配备有第一位线BL,存储电路和通道TR12。该存储电路配备有用于保持指示逻辑值的逻辑状态的第一存储节点14。通道TR 12连接到第一位线WL和第一节点14,以在两者之间形成传输线。除非访问存储单元10,否则向第一TR 12施加偏置电压,该偏置电压将第一TR 12基本上变为非接触状态。施加反向偏压的TR大大减少了通过焊道TR的泄漏电流。;版权所有:(C)1996,日本特许厅

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