首页> 外国专利> FORMATION OF P-TYPE II-VI COMPOUND SEMICONDUCTOR HETEROJUNCTION INTERFACE

FORMATION OF P-TYPE II-VI COMPOUND SEMICONDUCTOR HETEROJUNCTION INTERFACE

机译:P型II-VI型复合半导体异质结界面的形成

摘要

PURPOSE: To make it possible to form a heterojunction interface having a low contact resistance by a method wherein recesses and projections of a depth of 2 specified value or higher are formed in and on the heterojunction interface and the like. ;CONSTITUTION: Recesses and projections of a depth of 50nm or deeper are formed in an on a first P-type II-VI compound semiconductor later 2 and a second P-type II-I compound semiconductor layer 5 is formed on the layer 2 via a superlattice layer 4, which consists of the layers 8 and 5, or a mixed crystal layer. For example, an SiO2 film 3 is deposited on a semi-insulative GaAs substrate 1 and an SiO2 pattern is formed by photolithography technique and a wet etching. Then, V-shaped grooves of a depth of 50nm are formed in the substrate 1 by a wet etching. After that, a molecular beam epitaxial growth of a P-type ZnSe layer 2, a P-type ZnSe/ZnTe superlattice layer 4 and a P-type ZnTe cap layer 5 is performed. Lastly, a P-type electrode 14 is formed on the surface of the layer 5.;COPYRIGHT: (C)1996,JPO
机译:目的:通过在异质结界面等之中和之上形成深度为2个规定值以上的凹凸的方法,可以形成接触电阻低的异质结界面。组成:在随后的第一P型II-VI化合物半导体2上形成一个深度为50nm或更深的凹槽和凸起,在第二层P型II-I化合物半导体层5上通过由层8和5组成的超晶格层4或混合晶体层。例如,在半绝缘GaAs衬底1上淀积SiO 2 膜3,并通过光刻技术和湿法蚀刻形成SiO 2 图案。然后,通过湿蚀刻在基板1中形成深度为50nm的V形凹槽。之后,进行P型ZnSe层2,P型ZnSe / ZnTe超晶格层4和P型ZnTe盖层5的分子束外延生长。最后,在层5的表面上形成P型电极14。版权所有:(C)1996,JPO

著录项

  • 公开/公告号JPH08236550A

    专利类型

  • 公开/公告日1996-09-13

    原文格式PDF

  • 申请/专利权人 HITACHI LTD;

    申请/专利号JP19950033314

  • 申请日1995-02-22

  • 分类号H01L21/363;H01L21/203;H01S3/18;

  • 国家 JP

  • 入库时间 2022-08-22 04:03:50

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