PURPOSE:To always store correct data in a data holding circuit regardless of the delay of a data storage control signal, by finishing a data storing operation after detecting the completion of the storage of data. CONSTITUTION:A data decision reference signal line 2 has its capacity of about 10% the maximum one of those capacities of signal buses, DB0-DBn. Thus the data on the line 2 is decided in a data transfer period after the data on all signal buses DBi are decided. A write detecting circuit has the same delay characteristics as a data holding circuit Li and therefore detects by a data write end signal that the data writing jobs are through to all circuits Li. The write completion signal is inputted to a data storage control circuit 1 and inactivates the activated data storage control signal. While the circuit Li holds data. Thus it is possible to always store the correct data in a data holding device.
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