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Digital circuit maruchidorotsupu circuit

机译:吉吉塔·马奎多鲁·浦

摘要

PURPOSE:To attain OR logic of optional time slots by using plural storage circuits so as to repeat the write of OR logic of an input data, storage of written content and initial setting in parallel sequentially corresponding to a line number. CONSTITUTION:A line number (b) is read corresponding to a channel number (a) is read from an address control storage circuit 5 storing a line number corresponding to a channel number. When the level of a control signal (c) is at an H, write signals f, g are fed to data storage circuits 6, 7, and a selector 9 outputs selectively a read output signal of a storage circuit 6 and a selector 10 outputs selectively a read output signal of a data storage circuit 8 by using a selection signal (s). Since the level of control signals d, e is at an L level, all 0 is written in the storage circuit 7 to apply initial setting. Thus, in reading the data from storage circuits 6-8 storing the data, the OR logic of channels of the same line number is taken.
机译:目的:通过使用多个存储电路来获得可选时隙的“或”逻辑,以重复输入数据的“或”逻辑,与行号相对应的并行顺序地并行存储写入内容和初始设置。构成:从地址控制存储电路5读取对应于信道号(a)的行号(b),该地址控制存储电路5存储对应于信道号的行号。当控制信号(c)的电平为H时,写入信号f,g被馈送到数据存储电路6、7,并且选择器9选择性地输出存储电路6的读取输出信号,并且选择器10输出通过使用选择信号选择性地选择数据存储电路8的读取输出信号。由于控制信号d,e的电平为L电平,因此将全0写入存储电路7以进行初始设定。因此,在从存储数据的存储电路6-8读取数据时,采用相同行号的通道的或逻辑。

著录项

  • 公开/公告号JP2504459B2

    专利类型

  • 公开/公告日1996-06-05

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD;

    申请/专利号JP19870094129

  • 申请日1987-04-16

  • 分类号H04L5/22;H04L12/40;

  • 国家 JP

  • 入库时间 2022-08-22 03:56:20

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