METHOD AND STRUCTURE FOR SEMICONDUCTOR DEVICE INTERCONNECT LAYOUT FOR REDUCING PREMATURE ELECTROMIGRATION FAILURE CAUSED BY HIGH LOCALIZED CURRENT DENSITY

摘要

PROBLEM TO BE SOLVED: To provide an interconnect layout structure, and its manufacturing method, to reduce failure caused by electromigration in a region, where current density is locally high. ;SOLUTION: In a first technique, an interconnect structure 10 reduces peak localized interconnect current density by distributing a current flow around the periphery 22 of an interlevel connector 14 in a semiconductor device. In the second technique, the interconnect level is formed of a polycrystalline material, and by only using intrinsically plural branch lines, the two points in the semiconductor device are connected together. Each of branch lines has a line width narrower than that of the central particle size of the polycrystalline material. In a third technique, an interconnect line comprises, intrinsically, plural upper side and lower side straps connected by plural interlevel connectors. Thus a chain structure, wherein substantially the full length between two points in the semiconductor device is connected, is provided.;COPYRIGHT: (C)1996,JPO