首页> 外国专利> ELECTRICALLY ERASABLE NONVOLATILE SEMICONDUCTOR MEMORY THAT PERMITS DATA OUT DESPITE THE OCCURRENCE OF OVER-ERASED MEMORY CELLS

ELECTRICALLY ERASABLE NONVOLATILE SEMICONDUCTOR MEMORY THAT PERMITS DATA OUT DESPITE THE OCCURRENCE OF OVER-ERASED MEMORY CELLS

机译:电擦除的非易失性半导体存储器,尽管发生了过度擦除的存储器单元,但仍允许数据输出

摘要

The purpose of the present invention is to provide an electrically erasable nonvolatile semiconductor memory that permits correct data readout despite the occurrence of over-erased memory cells. In the nonvolatile semiconductor memory of the invention, a select transistor whose gate is connected to a word line is provided for each group consisting of a plurality of memory cells, and the sources of the memory cells in the same group are connected to a common source via the select transistor. For writing and erasure, the source-drain relationship is reversed from that previously practiced, so that for writing the drain is grounded and a positive voltage is applied to the source while for erasure the source is grounded and a high voltage is applied to the drain. In a nonvolatile semiconductor memory according to another mode of the invention, a source line is provided independently for every one or a plurality of word lines. For reading, the source line, word line, and bit line to which the memory cell selected for reading is connected are supplied with a lower supply voltage, a higher supply voltage, and a positive voltage lower than the higher supply voltage, respectively, while the source lines and word lines to which the selected memory cell is not connected are supplied with the higher supply voltage and the lower supply voltage, respectively, and the bit lines to which the selected memory cell is not connected are opened.
机译:本发明的目的是提供一种电可擦除的非易失性半导体存储器,尽管发生了过度擦除的存储器单元,该存储器仍允许正确的数据读出。在本发明的非易失性半导体存储器中,为由多个存储单元组成的每个组提供其栅极连接到字线的选择晶体管,并且同一组中的存储单元的源极连接到公共源极。通过选择晶体管。为了进行写入和擦除,源极-漏极关系与以前的做法相反,因此,写入时漏极接地并且向源极施加正电压,同时为了擦除而将源极接地并且向漏极施加高电压。在根据本发明的另一模式的非易失性半导体存储器中,为每条字线或多条字线独立地提供源极线。为了读取,分别为选择读取的存储单元所连接的源极线,字线和位线提供较低的电源电压,较高的电源电压和低于较高电源电压的正电压。未连接选择的存储单元的源极线和字线分别被供给较高的电源电压和较低的电源电压,未连接选择的存储单元的位线被断开。

著录项

  • 公开/公告号KR960005356B1

    专利类型

  • 公开/公告日1996-04-24

    原文格式PDF

  • 申请/专利权人 FUJITSU K.K.;

    申请/专利号KR19940001685

  • 发明设计人 DAKEGUCHI DETSUJI;

    申请日1994-01-31

  • 分类号G11C16/00;

  • 国家 KR

  • 入库时间 2022-08-22 03:45:40

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号