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Cross-coupled parity circuit with charging circuitry to improve response time
Cross-coupled parity circuit with charging circuitry to improve response time
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机译:带有充电电路的交叉耦合奇偶校验电路可缩短响应时间
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摘要
A parity circuit generates an output parity bit responsive to a plurality of data input bits. The parity circuit comprises a plurality of transistor stages coupled to the input bits and the output bit, the value of the input bits defining at least one charging path through the transistor stages. The charging path is coupled at first and second nodes to a power supply, such that the charging path is supplied with current at both ends, thereby increasing the responsiveness of the parity circuit.
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