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High capacity run-length-limited coding system employing asymmetric and even-spaced codes

机译:采用非对称和等距码的大容量行程限制编码系统

摘要

A system for encoding and decoding binary data in a data transmission system, such as a magnetic or optical data storage channel. The encoding process is implemented as a two-step RLL coding procedure wherein the original user bit data are first encoded as an asymmetric RLL code signal at a reduced clock rate and then translated to a second even- spaced RLL code signal suitable for recording to a data storage medium at a full- speed clock rate. The system also provides for recovering suitable even- spaced RLL codes recorded at a full-speed clock rate, translating the recovered even-spaced RLL code signal to an asymmetric RLL code signal at a reduced clock rate, and then decoding the asymmetric RLL code signal to recover the original user bit data. A preferred embodiment uses a rate 2/5 (2, 16, 2) even-spaced RLL code at a full- speed clock rate and a rate 4/5 (0,7; 1,8) asymmetric RLL code at a half- speed clock rate. The rate 4/5 asymmetric RLL code has a high capacity and the rate 2/5 even-spaced RLL code has a wide detection window. The intercode translation procedure requires only simple time-delay circuitry.
机译:一种用于在诸如磁或光数据存储通道的数据传输系统中对二进制数据进行编码和解码的系统。编码过程实现为两步RLL编码过程,其中原始用户比特数据首先以降低的时钟速率被编码为非对称RLL码信号,然后转换为适合记录到第二位的第二个均匀间隔的RLL码信号。全速时钟速率的数据存储介质。该系统还提供了恢复以全速时钟速率记录的合适的均匀间隔的RLL代码,以降低的时钟速率将恢复的均匀间隔的RLL代码信号转换为不对称的RLL代码信号,然后解码该不对称的RLL代码信号恢复原始用户位数据。一个优选实施例以全速时钟速率使用速率为2/5(2、16、2)的偶数间隔的RLL码,并在一半速率下使用速率为4/5(0.7; 1.8)的非对称RLL码。速度时钟速率。速率为4/5的非对称RLL码具有高容量,速率为2/5的偶数间隔RLL码具有较宽的检测窗口。代码间转换过程仅需要简单的延时电路。

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