Semiconductor device assembly including power or ground plane which is provided on opposite surface of insulating layer from signal traces, and is exposed to central opening in insulating layer for interconnection to semiconductor die

摘要

One or two, or more, additional conductive layers, separated from one another (if two or more) and separated from a patterned (signal) conductive layer are formed in a flexible substrate, for mounting a semiconductor die in a semiconductor device assembly. These additional layers are used as separate planes for carrying power and/or ground from outside the assembly to the die, on a separate plane from signals entering or exiting the die. Another aspect of the present invention provides a semiconductor device assembly including a first conductive layer with a plurality of traces formed on an insulating layer, a second conductive layer with an inner edge portion exposed within the central opening in the insulating layer, and a leadframe having a number of leads the inner end of one or more of the leads being electrically connected to an outer end of one or more of the traces. Selected traces are cut substantially at an inner peripheral edge of the first insulating layer, bent past the first insulating layer, and bonded to the exposed inner edge portion of the second conductive layer. The insulting layer may also include an outer peripheral opening through which an outer edge portion of the second conductive layer is exposed. The selected traces are cut substantially at the inner edge of the outer peripheral opening in the insulating layer, bent past the insulating layer, and bonded to the outer edge portion of the second conductive layer.