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N channel output driver with boosted gate voltage

机译:N通道输出驱动器,栅极电压升高

摘要

Disclosed is an output circuit capable of improving the load driving performance of a semiconductor device. The output circuit has first and second N channel MOS transistors connected in series between a high- potential power supply and a low-potential power supply. Both transistors produce an output signal at a node therebetween in response to complementary input signals. The output circuit includes a booster circuit, connected to the first transistor. The booster circuit is supplied with power from the high-potential power supply. In response to a clock signal and an input signal for enabling the first transistor, the booster circuit produces a voltage higher than the potential level of the high-potential power supply and applies the higher voltage to the first transistor.
机译:公开了一种能够改善半导体器件的负载驱动性能的输出电路。输出电路具有串联连接在高电势电源和低电势电源之间的第一和第二N沟道MOS晶体管。两个晶体管响应于互补输入信号而在其间的节点处产生输出信号。输出电路包括升压电路,其连接到第一晶体管。升压电路由高压电源供电。响应于时钟信号和用于启用第一晶体管的输入信号,升压电路产生高于高电位电源的电位电平的电压,并将较高的电压施加到第一晶体管。

著录项

  • 公开/公告号US5559452A

    专利类型

  • 公开/公告日1996-09-24

    原文格式PDF

  • 申请/专利权人 FUJITSU LIMITED;

    申请/专利号US19950420487

  • 发明设计人 TERUHIKO SAITO;

    申请日1995-04-12

  • 分类号H03K19/0185;

  • 国家 US

  • 入库时间 2022-08-22 03:37:49

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