Timing model and characterization system for logic simulation of integrated circuits which takes into account process, temperature and power supply variations

摘要

A method determines approximate propagation delay through logic devices within a library. Each logic cell within the library is characterized at baseline conditions to obtain parameters for each logic cell which define propagation delay through each logic cell at the baseline conditions. A subset of the logic cells are characterized at conditions varying from the baseline conditions to obtain scaling parameters. The scaling parameters modify values of the parameters for all logic cells within the library in order to approximate changes in propagation delay through each logic cell resulting from changes in the baseline conditions. In the preferred embodiment, the conditions varying from the baseline conditions includes a change in at least one of operating temperature, power supply voltage and process conditions.