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A CACHE FLUSH MECHANISM FOR A SECONDARY CACHE MEMORY

机译:二级缓存的缓存机制

摘要

The bimodulus that a kind of effective mechanism cache flushing can be applied to multiple storage systems operations is disclosed. Bimodulus concrete composition two-way mode physically distinguishes the entire address of at least part for the logical address space that main memory shares respectively using two. The switch mode for indicating those signals (SMIACT#) is interrupted, the offer of second level cache is provided. When generating SMIACT# by CPU and system detection core, the cache of system core interchanger memory bank is write back, and is violated hence into memory consistency in cache and main memory. But the present invention interrupts SMIACT# just to reach the cache flushing before on system core, ensure that the content of the cache memory writes back correct memory bank and initially resides in data, because the system core thinks, although actually generating SMIACT# as mode does not switch CPU.
机译:公开了一种有效机制高速缓存刷新可以应用于多个存储系统操作的双模。双模具体组成双向模式使用两个分别区分主存储器分别共享的逻辑地址空间的至少一部分的整个地址。指示那些信号的开关模式(SMIACT#)被中断,提供了二级缓存。当由CPU和系统检测核心生成SMIACT#时,系统核心交换器存储库的高速缓存将被回写,从而违反了高速缓存和主内存中的内存一致性。但是本发明中断SMIACT#只是为了在系统核心上到达缓存刷新之前,确保缓存存储器的内容写回正确的存储体并最初驻留在数据中,因为系统核心认为,尽管实际上以模式生成SMIACT#不切换CPU。

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