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Complementary clock pulse generator using CMOS technology
Complementary clock pulse generator using CMOS technology
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机译:使用CMOS技术的互补时钟脉冲发生器
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摘要
A first transmit switch (2) contains an input (23), an output and two control terminals (21,22) for coupling the input and output terminals, when the input clock pulse signal (Clkin) has reached the first control terminal (21), and the inverted clock pulse signal from the first inverter (11) has reached the second control terminal (22). A second transmit switch (3) has two control terminals (31,32) for coupling its input (33) and output terminal (34) under similar conditions as for the first switch. The synonymous clock pulse signals (Clk) are obtained from the first switch output terminal, and the counterphase clock pulse signals (Clk) are derived from the second switch output terminal.
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