Charge pump circuit, in particular for generating a negative substrate bias voltage or a positive raised memory operation voltage

摘要

In response to the clock pulse signal from the capacitor (13), the transistor (10) transmit a first reference voltage (GND) to a first node (N13) which receives a second clock pulse signal via capacitive coupling of a second capacitor (12). Between the first node and a second one (N14), a rectifier (9) is incorporated. Thus the charges, used for generating a preset voltage, are transmitted from the two nodes in rectified mode. The rectifier differs from the first transistor by conductive mechanism and type. Pref. the first transistor is an IGFET of first conductivity, and the rectifier is an IGFET of opposite conductivity switched as a diode. USE/ADVANTAGE - For MOSFET memory, with increased efficiency and structure suitable for high integration without minority charge carrier injection.