首页> 外国专利> PROBE SUBSTRATE FOR INSPECTING QUALITY OF SEMICONDUCTOR CHIP, MANUFACTURING METHOD OF THIS PROBE SUBSTRATE, AND QUALITY INSPECTING DEVICE OF SEMICONDUCTOR CHIP USING THIS PROBE SUBSTRATE

PROBE SUBSTRATE FOR INSPECTING QUALITY OF SEMICONDUCTOR CHIP, MANUFACTURING METHOD OF THIS PROBE SUBSTRATE, AND QUALITY INSPECTING DEVICE OF SEMICONDUCTOR CHIP USING THIS PROBE SUBSTRATE

机译:用于检查半导体芯片质量的探针基质,该探针基质的制造方法以及使用该探针基质的半导体芯片的质量检查装置

摘要

PROBLEM TO BE SOLVED: To enable the fine adjustments of a position to place a semiconductor chip by forming a conductive protrusion which comes into contact with the pad of the chip on a wiring pattern on a transparent substrate. ;SOLUTION: One side of a quartz glass substrate 1 is vacuum-deposited into an approximately 0.1μm-thick copper conductive film 2 and in addition is plated with approximately 10μm-wide electrolytic copper. A photoresist is applied over there, and after a photographing process, an approximately 10μm-wide micro-wiring pattern 3 is formed. An approximately 20μm-wide positive-type photoresist 4 for thick application is applied over it, exposure and development are performed, and a resist opening part 6 is formed in a location matching an aluminium pad. Next, nickel plating is performed to a thickness of approximately 20μm almost enough to bridge the resist opening part 6, and hard gold plating is performed over there to a thickness of approximately 0.1μm. Then the photoresist 4 is fused and removed to form a conductive protrusion. Next, the quartz glass substrate 1 is cut into a suitable size to complete a transparent probe 8. Thereby, it is possible to verify the state of mutual contact and position displacements.;COPYRIGHT: (C)1998,JPO
机译:解决的问题:通过在透明基板上的配线图案上形成与芯片的焊盘接触的导电性突起,从而能够对放置半导体芯片的位置进行微调。 ;解决方案:将石英玻璃基板1的一侧真空沉积到约0.1μm厚的铜导电膜2中,并另外镀上约10μm宽的电解铜。在其上施加光致抗蚀剂,并且在照相处理之后,形成大约10μm宽的微布线图案3。在其上施加约20μm宽的用于厚涂的正型光致抗蚀剂4,进行曝光和显影,并在与铝垫匹配的位置形成抗蚀剂开口部6。接下来,执行镀镍至几乎足以桥接抗蚀剂开口部6的约20μm的厚度,并且在其上执行镀金至约0.1μm的厚度的硬金。然后将光致抗蚀剂4熔化并去除以形成导电突起。接下来,将石英玻璃基板1切割成适当的尺寸以完成透明探针8。由此,可以验证相互接触和位置位移的状态。;版权:(C)1998,JPO

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