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MULTILAYER PRINTED CIRCUIT BOARD STRUCTURE AND IC MOUNTING STRUCTURE OF MULTILAYER PRINTED CIRCUIT BOARD

机译:多层印刷电路板结构和集成电路印刷电路板的安装结构

摘要

PROBLEM TO BE SOLVED: To reduce to minimum the wiring length between bare chip ICs. ;SOLUTION: The pads 21-1 to 21-7 of a bare chip IC 21 are connected to pads 23-1 to 23-7 with wires 36-1 to 36-7. The pads 22-1 to 22-7 of a bare chip IC 22 are connected to pads 24-1 to 24-7 with wires 37-1 to 37-7. The pads 23-1 and 24-1 are connected together with a conductor 25-1, a via land 27-1, a bonding material 35-1, a conductor 34-1 and a conductor 26-1. The pads 23-2 and 24-2 are connected together with a conductor 25-2, a bonding material 35-2, a conductor 33-1, a bonding material 35-2, a conductor 26-2, and a via land 28-1. The pads 23-3 and 24-3 and via lands 27-2 and 28-2 are connected together with conductors 25-3 and 26-3. The pads 23-4 and 24-4 and the pads 23-5 and 24-5 are connected together the same as above.;COPYRIGHT: (C)1998,JPO
机译:要解决的问题:尽量减少裸芯片IC之间的布线长度。 ;解决方案:裸芯片IC 21的焊盘21-1至21-7通过导线36-1至36-7连接至焊盘23-1至23-7。裸芯片IC 22的焊盘22-1至22-7通过导线37-1至37-7连接至焊盘24-1至24-7。焊盘23-1和24-1与导体25-1,通孔焊盘27-1,接合材料35-1,导体34-1和导体26-1连接在一起。焊盘23-2和24-2与导体25-2,接合材料35-2,导体33-1,接合材料35-2,导体26-2和通孔焊盘28连接在一起。 -1。焊盘23-3和24-3以及通孔焊盘27-2和28-2与导体25-3和26-3连接在一起。焊盘23-4和24-4以及焊盘23-5和24-5的连接方式与上述相同。版权所有:(C)1998,JPO

著录项

  • 公开/公告号JPH1027879A

    专利类型

  • 公开/公告日1998-01-27

    原文格式PDF

  • 申请/专利权人 OKI ELECTRIC IND CO LTD;

    申请/专利号JP19960180259

  • 发明设计人 KANEYAMA FUMIYASU;

    申请日1996-07-10

  • 分类号H01L23/522;H05K1/18;H05K3/46;

  • 国家 JP

  • 入库时间 2022-08-22 03:05:27

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