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Chopper die comparator null for serial-parallel die AD converter

机译:斩波器裸片比较器null对于串行并行裸片AD转换器

摘要

PURPOSE:To realize a comparator with a stable hold function by providing 1st capacitor, driving 3rd switch in phase with the 1st switch, holding a signal potential and comparing it with a reference potential. CONSTITUTION:A switch 2 is subject to ON/OFF control so that it is turned on depending on a phase of a clock signal phis, e.g., at a high potential, and switches 8, 12 are subject to ON/OFF control in phase with the switch 2. Moreover, the switch 4 is subject to ON/OFF control so that it is turned on depending on the phase of a clock signal phir, e.g., at a high potential. When the switches 2, 8, 12 are turned on at a period of the high signal phis, a signal potential Vs is fed to the circuit, and capacitors 6, 9 are charged. When the signals phis, phir are at a low potential, the switches 2, 4, 8, 12 are all turned on the charging potential of the capacitors 6, 9 is held and when the signal phir reaches a high potential, the switch 4 is turned on, the potential Vs and the reference potential Vr are compared and an output is extracted from the terminal 14.
机译:目的:通过提供第一个电容器,与第一个开关同相驱动第三个开关,保持信号电势并将其与参考电势进行比较,以实现具有稳定保持功能的比较器。组成:开关2受到开/关控制,以便根据时钟信号phis的相位(例如,处于高电位)将其打开,而开关8、12则与时钟2的相位进行开/关控制此外,对开关4进行开/关控制,使得其根据时钟信号phir的相位而导通,例如处于高电位。当开关2、8、12以高信号phis的周期导通时,信号电势Vs被馈送到电路,并且电容器6、9被充电。当信号phis,phir处于低电位时,开关2、4、8、12全部接通,电容器6、9的充电电位被保持,并且当信号phir达到高电位时,开关4处于闭合状态。在接通时,比较电势Vs和参考电势Vr,并从端子14提取输出。

著录项

  • 公开/公告号JP2757991B2

    专利类型

  • 公开/公告日1998-05-25

    原文格式PDF

  • 申请/专利权人 SONII KK;

    申请/专利号JP19880015561

  • 发明设计人 FUKUSHIMA NORYUKI;

    申请日1988-01-26

  • 分类号H03K5/08;H03M1/34;

  • 国家 JP

  • 入库时间 2022-08-22 03:00:54

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