Auto-Lock Circuit Guaranteeing Low Jitter in Phase-Locked Loop Frequency Synthesizers Irrespective of Process Variations

摘要

By using the bias switch 260 to define a unique current range within the bias generator 142 for each n-bit counter output state, it is possible to control the VCO 140 having a very wide operating frequency range. . These frequency ranges must overlap to ensure lock regardless of process or environment (temperature and voltage) changes. Depending on the input of the full lock signal OLS to the n-bit counter 250 on the rising edge of its clock signal CLK, it is possible to scan the entire spectrum of the VCO frequency range until synchronization is achieved. By comparing the switch voltage with the reference voltage Vref, it is possible to prevent the PLL from synchronizing on the shortest right side of the frequency range if synchronization cannot be maintained over the entire operating temperature range. By strobing the fine synchronization signal FLS at the integer m (1) points, it is possible to prevent erroneous synchronization from occurring.