Complementary Metal Oxide Semiconductor Horn Voltage Input / Output Driver Circuit and High Reliable I / O Stacked Field Effect Transistor

摘要

SUMMARY OF THE INVENTION In accordance with the present invention, in I / O stacked field effect transistors (FETs), the impact on device reliability due to chip edge length variation (ACLV), gate ion channeling and potential is reduced or eliminated. A pair of stacked PFETs and a pair of stacked NFETs are connected to the I / O pad. PFETs and NFETs adjacent to I / O pads are each designed to have a longer channel length than PFETs and NFETs that are separate from the I / O pads. This has the effect that the PFET and NFET adjacent to the I / O pad are not affected by leakage.;Alternatively, a Schottky or P / N junction diode is connected between the node between the two PFETs and the gate of the PFET adjacent to the I / O pad and another Schottky or P / N junction diode is connected between the node between the two NFETs And the gate of the NFET adjacent to the I / O pad. These Schottky diodes operate to clamp the nodes between the PFET pair and the NFET pairs to a voltage close to the gate voltage, respectively. A similar clamping operation can be realized by using NFET instead of Schottky or P / N junction diode for PFET pair and using PFET instead of Schottky or P / N junction diode for NFET pair.