A semiconductor chip package having a structure in which an LOC (LOC) lead and a standard lead are combined

摘要

The present invention relates to a semiconductor chip package having a structure capable of effectively mounting a highly integrated semiconductor chip while maintaining the advantages of a central pad type and an LOC structure, The inner lead of the lead frame has a first inner lead of the LOC structure attached to the active surface and a second inner lead of standard type arranged to be spaced apart from the chip. The first inner lead is electrically connected to the center electrode pad by wire bonding or metal bump, and the second inner lead is electrically connected to the peripheral electrode pad by wire bonding. The lead frame may include a tie bar and an alignment key which are connected between the corner lead and the side rail by adjusting the degree of bending of the first inner lead to realize an optimum vertical structure inside the package. According to the present invention, it is possible to overcome the limit of the lead frame processing and effectively mount a memory element having a high degree of integration due to a chip shrinking technique or the like, using the LOC structure.