Semiconductor memory device using sub-wordline drivers having width/length ratio of transistors varies from closest to farthest location from memory block selection circuits

摘要

An improved word line driving circuit for a memory device reduces a driving speed difference between an assistant word line driving unit, which is closest to a memory cell block selection unit, and an assistant word line driving unit, which is farthest from the memory cell block selection unit, for selecting a block of memory cell. Further, the improved circuit substantially allows a non-overlap margin between word lines by differing the size of an assistant word line driving unit connected to each word line according to its location. The improved circuit also includes a memory cell block selection unit for outputting a block selection signal so as to select a memory cell block, a plurality of main word line driving units for outputting a main word line signal, and a plurality of assistant word line driving units.