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Structure and method for SDRAM dynamic self refresh entry and exit using JTAG
Structure and method for SDRAM dynamic self refresh entry and exit using JTAG
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机译:使用jtag的sDRAM动态自刷新进入和退出的结构和方法
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摘要
JTAG test logic and a memory controller place an SDRAM in a self refresh mode prior to beginning JTAG testing. The memory controller can complete a current memory access and otherwise prepare for the JTAG test. During the JTAG test, self refresh mode operation of the SDRAM retains data without the need for a clock signal or refresh signals which are suspended for the JTAG test. Accordingly, after the JTAG test, circuit operation can continue without reinitializing data in the SDRAM.
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