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Method for deciding the feasibility of logic circuit prior to performing logic synthesis
Method for deciding the feasibility of logic circuit prior to performing logic synthesis
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机译:在进行逻辑综合之前确定逻辑电路的可行性的方法
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摘要
A logic circuit design procedure comprises a step of deciding the feasibility of hardware after HDL description and functional verification, and a step of performing logic synthesis of the HDL description which has been determined to be feasible. The feasibility decision step comprises at least a decision on the possibility of spike transfer and a decision on oscillation. The spike transfer check step determines whether at least one of a clock signal and a reset signal of any sequential circuit is output from a combinational circuit. The oscillation check step determines whether an output signal of any combinational circuit is recursively input thereto without passing through a sequential circuit. Only the HDL description which passes the feasibility test is allowed to enter the logic synthesis stage.
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